Almost logarithmic-time space optimal leader election in population protocols

Leszek Gąsieniec, Grzegorz Stachowiak, Przemysław Uznański

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Scopus citations

Abstract

The model of population protocols refers to a large collection of simple indistinguishable entities, frequently called agents. The agents communicate and perform computation through pairwise interactions. We study fast and space efficient leader election in population of cardinality n governed by a random scheduler, where during each time step the scheduler uniformly at random selects for interaction exactly one pair of agents. We present the first o(log2)-time leader election protocol. It operates in expected parallel time O(log n log log n) which is equivalent to O(n log n log log n) pairwise interactions. This is the fastest currently known leader election algorithm in which each agent utilises asymptotically optimal number of O(log log n) states. The new protocol incorporates and amalgamates successfully the power of assorted synthetic coins with variable rate phase clocks.

Original languageEnglish (US)
Title of host publicationSPAA 2019 - Proceedings of the 31st ACM Symposium on Parallelism in Algorithms and Architectures
PublisherAssociation for Computing Machinery
Pages93-102
Number of pages10
ISBN (Electronic)9781450361842
DOIs
StatePublished - Jun 17 2019
Externally publishedYes
Event31st ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2019 - Phoenix, United States
Duration: Jun 22 2019Jun 24 2019

Publication series

NameAnnual ACM Symposium on Parallelism in Algorithms and Architectures

Conference

Conference31st ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2019
Country/TerritoryUnited States
CityPhoenix
Period6/22/196/24/19

Keywords

  • Distributed algorithm
  • Leader election
  • Population protocols
  • Randomised algorithm

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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