Brief announcement: Oh-RAM! One and a half round read/write atomic memory

Theophanis Hadjistasi, Nicolas Nicolaou, Alexander Allister Schwarzmann

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Emulating atomic read/write shared objects in a message- passing system is a fundamental problem in distributed computing. Considering that network communication is the most expensive resource, efficiency is measured first of all in terms of the communication needed to implement read and write operations. It is well known that two commu- nication round-trip phases involving in total four message exchanges are sufficient to implemented atomic operations. In this work we present a comprehensive treatment of the question of when and how it is possible to implement atomic memory where read and write operations complete in three message exchanges, i.e., we aim for One and half Round Atomic Memory, hence the name Oh-RAM! We present al- gorithms that allow operations to complete in three commu- nication exchanges without imposing any constraints on the number of readers and writers. We present an implementa- tion for the single-writer/multiple-reader (SWMR) setting, where reads complete in three communication exchanges and writes complete in two exchanges. Then we pose the question of whether it is possible to implement multiple- writer/multiple-reader (MWMR) memory where operations complete in at most three communication exchanges. We answer this question in the negative by showing that an atomic memory implementation is impossible if both read and write operations take three communication exchanges, even when assuming two writers, two readers, and a single replica server failure. Motivated by this impossibility re- sult, we provide a MWMR atomic memory implementation where reads involve three and writes involve four communi- cation exchanges. In light of our impossibility result these algorithms are optimal in terms of the number of commu- nication exchanges.

Original languageEnglish (US)
Title of host publicationPODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing
PublisherAssociation for Computing Machinery
Pages353-355
Number of pages3
Volume25-28-July-2016
ISBN (Electronic)9781450339643
DOIs
StatePublished - Jul 25 2016
Externally publishedYes
Event35th ACM Symposium on Principles of Distributed Computing, PODC 2016 - Chicago, United States
Duration: Jul 25 2016Jul 28 2016

Other

Other35th ACM Symposium on Principles of Distributed Computing, PODC 2016
CountryUnited States
CityChicago
Period7/25/167/28/16

Fingerprint

Random access storage
Data storage equipment
Communication
Message passing
Distributed computer systems
Telecommunication networks
Computer systems
Servers

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications

Cite this

Hadjistasi, T., Nicolaou, N., & Schwarzmann, A. A. (2016). Brief announcement: Oh-RAM! One and a half round read/write atomic memory. In PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing (Vol. 25-28-July-2016, pp. 353-355). Association for Computing Machinery. https://doi.org/10.1145/2933057.2933073

Brief announcement : Oh-RAM! One and a half round read/write atomic memory. / Hadjistasi, Theophanis; Nicolaou, Nicolas; Schwarzmann, Alexander Allister.

PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing. Vol. 25-28-July-2016 Association for Computing Machinery, 2016. p. 353-355.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hadjistasi, T, Nicolaou, N & Schwarzmann, AA 2016, Brief announcement: Oh-RAM! One and a half round read/write atomic memory. in PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing. vol. 25-28-July-2016, Association for Computing Machinery, pp. 353-355, 35th ACM Symposium on Principles of Distributed Computing, PODC 2016, Chicago, United States, 7/25/16. https://doi.org/10.1145/2933057.2933073
Hadjistasi T, Nicolaou N, Schwarzmann AA. Brief announcement: Oh-RAM! One and a half round read/write atomic memory. In PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing. Vol. 25-28-July-2016. Association for Computing Machinery. 2016. p. 353-355 https://doi.org/10.1145/2933057.2933073
Hadjistasi, Theophanis ; Nicolaou, Nicolas ; Schwarzmann, Alexander Allister. / Brief announcement : Oh-RAM! One and a half round read/write atomic memory. PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing. Vol. 25-28-July-2016 Association for Computing Machinery, 2016. pp. 353-355
@inproceedings{26779216127e4c53974935ab3f4da1af,
title = "Brief announcement: Oh-RAM! One and a half round read/write atomic memory",
abstract = "Emulating atomic read/write shared objects in a message- passing system is a fundamental problem in distributed computing. Considering that network communication is the most expensive resource, efficiency is measured first of all in terms of the communication needed to implement read and write operations. It is well known that two commu- nication round-trip phases involving in total four message exchanges are sufficient to implemented atomic operations. In this work we present a comprehensive treatment of the question of when and how it is possible to implement atomic memory where read and write operations complete in three message exchanges, i.e., we aim for One and half Round Atomic Memory, hence the name Oh-RAM! We present al- gorithms that allow operations to complete in three commu- nication exchanges without imposing any constraints on the number of readers and writers. We present an implementa- tion for the single-writer/multiple-reader (SWMR) setting, where reads complete in three communication exchanges and writes complete in two exchanges. Then we pose the question of whether it is possible to implement multiple- writer/multiple-reader (MWMR) memory where operations complete in at most three communication exchanges. We answer this question in the negative by showing that an atomic memory implementation is impossible if both read and write operations take three communication exchanges, even when assuming two writers, two readers, and a single replica server failure. Motivated by this impossibility re- sult, we provide a MWMR atomic memory implementation where reads involve three and writes involve four communi- cation exchanges. In light of our impossibility result these algorithms are optimal in terms of the number of commu- nication exchanges.",
author = "Theophanis Hadjistasi and Nicolas Nicolaou and Schwarzmann, {Alexander Allister}",
year = "2016",
month = "7",
day = "25",
doi = "10.1145/2933057.2933073",
language = "English (US)",
volume = "25-28-July-2016",
pages = "353--355",
booktitle = "PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing",
publisher = "Association for Computing Machinery",

}

TY - GEN

T1 - Brief announcement

T2 - Oh-RAM! One and a half round read/write atomic memory

AU - Hadjistasi, Theophanis

AU - Nicolaou, Nicolas

AU - Schwarzmann, Alexander Allister

PY - 2016/7/25

Y1 - 2016/7/25

N2 - Emulating atomic read/write shared objects in a message- passing system is a fundamental problem in distributed computing. Considering that network communication is the most expensive resource, efficiency is measured first of all in terms of the communication needed to implement read and write operations. It is well known that two commu- nication round-trip phases involving in total four message exchanges are sufficient to implemented atomic operations. In this work we present a comprehensive treatment of the question of when and how it is possible to implement atomic memory where read and write operations complete in three message exchanges, i.e., we aim for One and half Round Atomic Memory, hence the name Oh-RAM! We present al- gorithms that allow operations to complete in three commu- nication exchanges without imposing any constraints on the number of readers and writers. We present an implementa- tion for the single-writer/multiple-reader (SWMR) setting, where reads complete in three communication exchanges and writes complete in two exchanges. Then we pose the question of whether it is possible to implement multiple- writer/multiple-reader (MWMR) memory where operations complete in at most three communication exchanges. We answer this question in the negative by showing that an atomic memory implementation is impossible if both read and write operations take three communication exchanges, even when assuming two writers, two readers, and a single replica server failure. Motivated by this impossibility re- sult, we provide a MWMR atomic memory implementation where reads involve three and writes involve four communi- cation exchanges. In light of our impossibility result these algorithms are optimal in terms of the number of commu- nication exchanges.

AB - Emulating atomic read/write shared objects in a message- passing system is a fundamental problem in distributed computing. Considering that network communication is the most expensive resource, efficiency is measured first of all in terms of the communication needed to implement read and write operations. It is well known that two commu- nication round-trip phases involving in total four message exchanges are sufficient to implemented atomic operations. In this work we present a comprehensive treatment of the question of when and how it is possible to implement atomic memory where read and write operations complete in three message exchanges, i.e., we aim for One and half Round Atomic Memory, hence the name Oh-RAM! We present al- gorithms that allow operations to complete in three commu- nication exchanges without imposing any constraints on the number of readers and writers. We present an implementa- tion for the single-writer/multiple-reader (SWMR) setting, where reads complete in three communication exchanges and writes complete in two exchanges. Then we pose the question of whether it is possible to implement multiple- writer/multiple-reader (MWMR) memory where operations complete in at most three communication exchanges. We answer this question in the negative by showing that an atomic memory implementation is impossible if both read and write operations take three communication exchanges, even when assuming two writers, two readers, and a single replica server failure. Motivated by this impossibility re- sult, we provide a MWMR atomic memory implementation where reads involve three and writes involve four communi- cation exchanges. In light of our impossibility result these algorithms are optimal in terms of the number of commu- nication exchanges.

UR - http://www.scopus.com/inward/record.url?scp=84984690323&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84984690323&partnerID=8YFLogxK

U2 - 10.1145/2933057.2933073

DO - 10.1145/2933057.2933073

M3 - Conference contribution

AN - SCOPUS:84984690323

VL - 25-28-July-2016

SP - 353

EP - 355

BT - PODC 2016 - Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing

PB - Association for Computing Machinery

ER -